High-Accuracy Computing on Low-Precision Hardware (HCLH)
To be held in conjunction with SC ‘26: The International Conference for High Performance Computing, Networking, Storage and Analysis located in Chicago, IL on November 15 - 20.
Workshop Overview
This workshop aims to bring together researchers, application scientists, system developers, and industry partners to explore algorithmic and implementation approaches enabling accurate scientific computing on low-precision hardware. As accelerators increasingly favor reduced-precision arithmetic for performance and energy efficiency, many scientific applications continue to require accuracy, stability, and reproducibility. Addressing this widening gap demands community-driven advances across algorithms and scientific software, spanning domain-informed and cross-cutting approaches while building toward reusable, precision-aware libraries and tooling infrastructure.
The workshop will feature invited talks and solicited works highlighting mixed-precision methods, error-aware and adaptive numerical algorithms, floating-point emulation libraries, and practical deployment on large-scale systems. The workshop emphasizes building community-driven software ecosystems for broad adoption across domains, reducing duplication, and accelerating impact. By fostering discussion among application developers, numerical experts, and hardware vendors, the workshop will establish best practices, share lessons, and strengthen academia–industry collaboration to make low-precision hardware a reliable component of scientific workflows.
Workshop Schedule
The workshop will feature invited talks, peer-reviewed paper presentations, and a panel discussion. A tentative schedule can be found below.
| Time | Session |
|---|---|
| 09:00 – 09:10 | Welcome and Introductory Remarks (Organizing Committee) |
| 09:10 – 09:40 | Invited Talk I |
| 09:40 – 10:15 | Accepted Papers: Session I |
| 10:15 – 10:30 | Break |
| 10:30 – 11:00 | Invited Talk II |
| 11:00 – 11:30 | Accepted Papers: Session II |
| 11:30 – 12:20 | Panel Discussion |
| 12:20 – 12:30 | Concluding Remarks and Open Discussion |
Invited speakers / panelists
TBD
Call for papers
Modern high-performance computing systems increasingly prioritize reduced-precision arithmetic such as FP16, BF16, TF32, FP8, and integer formats to improve performance and energy efficiency. At the same time, many scientific applications continue to require high accuracy, numerical stability, and reproducibility. This growing mismatch between hardware trends and application requirements presents a fundamental challenge for the HPC community. Given this changing landscape, the SC26 Workshop on High Accuracy Computing on Low Precision Hardware aims to build a cross-disciplinary community around precision-aware scientific computing by bringing together expertise from HPC, numerical analysis, computer architecture, compilers, libraries, and scientific application domains. In doing so, the workshop will provide a forum for researchers and practitioners from academia, national laboratories, and industry to discuss emerging techniques, practical deployment experiences, and evaluation methodologies that jointly consider performance, energy efficiency, and numerical fidelity.
A central goal of the workshop will be to advance scientifically reliable computation on low-precision hardware. The workshop will therefore welcome contributions on mixed-precision and precision-adaptive algorithms, floating-point emulation techniques such as FP64 emulation and Ozaki-style schemes, and alternative number systems such as posits. It will also cover methods for understanding numerical sensitivity, instability, and error propagation in scientific workloads; formal and empirical techniques for analyzing conditioning and robustness; algorithms, software, and runtime systems that adapt precision dynamically; and compiler and library support for precision-aware execution. Application case studies will also be in scope, including work in finite element methods, CFD, multiphysics, linear algebra, and AI-for-science workflows.
Topics will include but will not be limited to
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Mixed-precision and precision-adaptive algorithms
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Precision-aware iterative methods, solvers, and preconditioners
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Floating-point emulation techniques, including FP64 emulation and Ozaki-style schemes
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Alternative number formats and numerical representations, including posits and custom formats
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Numerical stability, conditioning, error propagation, and robustness analysis, including formal and empirical methods
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Tools for numerical debugging, verification, sensitivity analysis, and robustness evaluation
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Compiler, runtime, and library support for precision-aware execution
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Hardware/software co-design and use of low-precision accelerators for accurate scientific computing
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AI-driven or agentic methods for precision-aware analysis, tuning, and transformation of scientific software
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Application studies in areas such as FEM, CFD, multiphysics, linear algebra, and AI-for-science workflows
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Benchmarking and evaluation methodologies that jointly consider performance, energy efficiency, and numerical fidelity
Submission
Authors are invited to submit manuscripts in English structured as technical papers of up to 8 pages, with a minimum of 5 pages, in 2-column format (U.S. letter, 8.5” × 11”), excluding references, using IEEE proceedings template. Submissions are double-blind. Papers not conforming to these guidelines may be returned without review.
All manuscripts will be peer reviewed and evaluated on correctness, originality, technical strength, significance, clarity of presentation, and relevance to the workshop. Submitted papers must represent original unpublished work that is not currently under review for another conference or journal. At least one author of each accepted paper must register for and attend the workshop.
Papers should be submitted electronically at: submission link (add portal_url in this file when available), SC26 Workshop: HCLH’26: High-Accuracy Computing on Low-Precision Hardware.
The final papers will be published in the SC Workshops Proceedings.
For questions, contact:
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Reet Barik — rbarik@anl.gov
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Aditya Kashi — kashia@ornl.gov
Important dates
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Submission deadline: TBA
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Notification of acceptance: TBA
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Camera-ready deadline: TBA
Committees
Organizing committee
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Reet Barik, Argonne National Laboratory (ANL)
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Aditya Kashi, Oak Ridge National Laboratory (ORNL)
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Hao Lu, Oak Ridge National Laboratory (ORNL)
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Piotr Luszczek, MIT Lincoln Laboratory
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Paul Lin, Lawrence Berkeley National Laboratory (LBNL)
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Balavignesh Vemparala, Synopsys, Inc.
Program committee
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Markus Eisenbach, Oak Ridge National Laboratory (ORNL)
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Taylor Childers, Argonne National Laboratory (ANL)
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Hartwig Anzt, Technical University of Munich, Germany (TUM)
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Sherry Li, Lawrence Berkeley National Laboratory (LBNL)
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Rui Peng Li, Lawrence Livermore National Laboratory (LLNL)
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Dilip Asthagiri, Oak Ridge National Laboratory (ORNL)
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Thomas Gruetzmacher, NVIDIA Corporation (NVIDIA)
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Esteban Rangel, Argonne National Laboratory (ANL)
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Oscar Hernandez Mendoza, Oak Ridge National Laboratory (ORNL)
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Pratik Nayak, Technical University of Munich, Germany (TUM)
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Longfei Gao, Argonne National Laboratory (ANL)
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Nicholson Koukpaizan, Oak Ridge National Laboratory (ORNL)
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Kasia Swirydowicz, Advanced Micro Devices, Inc. (AMD)